Printed Circuit Board Design Suite

Tired of struggling with your current PCB design program? At Green Roof Solar, LLC, so were we. That is precisely why we came up with a better solution.

ProtoCap Schematic Designer

  • Open source, built upon Qt 4.8 in C++ (~15,800 lines) for Windows, Mac OS X, and Linux

  • Very simple to use – no complicated interfaces to learn, no databases to set up

  • Uses modern GL rendering with smooth mouse panning and zooming

  • Single designs can span multiple pages and connect only with net names

  • Library includes typical schematic symbols with 1-99 pin connectors

  • Automatic net naming mode (printf-style) for quicker drawing with large parts

  • Number and letter post-increment and post-decrement net naming

  • Vector PS/PDF export with automatic page layout and title/author/revision metadata

  • Netlist export needs no user input and opens directly in ProtoLay

  • Non-symbol library parts are included in every schematic for opening on any system

Downloads:

ProtoCap_1.1.0-win32.zip  (September 1, 2013; 6.3MB compressed / 15.4MB uncompressed)
ProtoCap_1.1.0-macosx.dmg  (September 1, 2013; 9.8MB compressed / 24.3MB uncompressed)
ProtoCap_1.1.0-source.tar.gz  (September 1, 2013; 345kB compressed / 2.2MB uncompressed)

ProtoLay PCB Route Designer

  • Open source, built upon Qt 4.8 in C++ (~22,200 lines) for Windows, Mac OS X, and Linux

  • Supports twelve routing layers as well as blind and buried vias

  • Uses modern GL rendering with smooth mouse panning and zooming

  • Seamless multi-threaded net minimization (minimum spanning tree calculation)

  • Gerber output follows the newest Revision I1 (2013) and avoids deprecated functions

  • Legacy Gerber output also available for compatibility with some manufacturers

  • Exports to two standard Gerber file extension sets (TOP/BOT and GTL/GBL)

  • Can export IPC-D-356 netlists and can create a generic pick-and-place spreadsheet

  • 50MB footprint library conforming to IPC-7351B with surface-mount and through-hole parts

  • Padstack names conform to IPC-7351B, allowing for chamfered and rounded corners

  • Supports three IPC-7351B board spacing environments: A/Most, B/Nominal, and C/Least

  • Highlighting modes available to show whole nets, trace length, and similar components

  • Array function for generating footprints and arranging components/traces on boards

  • Advanced net spacing rule entry for design to UL 840 (used for copper clearance to fills)

  • Concise ASCII file formats (netlist and design) for easy scripting (e.g. Python)

  • Only a single compact board design file is necessary to open a layout on any system

  • Designed to interface exclusively with the Green Roof Solar, LLC pick-and-place machine

Downloads:

ProtoLay_1.2.5-source.tar.gz  (March 23, 2015; 3.4MB compressed / 51.0MB uncompressed)
ProtoLay_1.2.2-win32.zip  (September 1, 2013; 9.2MB compressed / 64.0MB uncompressed)
ProtoLay_1.2.2-macosx.dmg  (September 1, 2013; 14.3MB compressed / 70.5MB uncompressed)